Dominantly inherited hereditary nonpolyposis colorectal cancer not caused by MMR genes

In the past two decades, multiple studies have been undertaken to elucidate the genetic cause of the predisposition to mismatch repair (MMR)-proficient nonpolyposis colorectal cancer (CRC). Here, we present the proposed candidate genes according to their involvement in specific pathways considered relevant in hereditary CRC and/or colorectal carcinogenesis. To date, only pathogenic variants inRPS20may be convincedly linked to hereditary CRC. Nevertheless, accumulated evidence supports the involvement in the CRC predisposition of other genes, includingMRE11,BARD1,POT1,BUB1B,POLE2,BRF1,IL12RB1,PTPN12, or the epigenetic alteration ofPTPRJ. The contribution of the identified candidate genes to familial/early onset MMR-proficient nonpolyposis CRC, if any, is extremely small, suggesting that other factors, such as the accumulation of low risk CRC alleles, shared environmental exposures, and/or gene-environmental interactions, may explain the missing heritability in CRC

Voltage-source-inverters with legs connected in parallel

The number of applications that require the use of power converters has been continually increasing in the last years on account of environmental and economical concerns. The power to be processed by these converters has been growing too. These applications include uninterruptible power supplies, motor drives, and distributed generation, such as solar photo-voltaic panels and wind turbines. The rated power of such converters can be raised by increasing the output currents. This can be chieved by connecting converter, converter legs or power devices in parallel. The connection of legs in parallel in a voltage ource inverter is made by means of inductors, hich can be either magnetically coupled or uncoupled. One of the issues that needs to be addressed is achieving an even contribution to the output current from all the legs. Current imbalances are due to circulating currents among the legs which must be avoided or controlled since they produce additional losses and stress to the power devices of the converter. An efficient technique to attain such a balance is presented in this thesis. The balancing technique achieves the objective regardless of the type of inductors used. In spite of the afore mentioned issues, the potential benefits of paralleling converter legs make their use a worthwhile option. Some of the additional benefits of paralleling are the improvement in the total harmonic distortion of the output current and voltage and the reduction of the output filters. Besides, inverters with legs connected in parallel are modular and because of that, their production and maintenance become less expensive. Moreover, they qualify for the implementation of fault-tolerant techniques thus offering the possibility to achieve systems with improved overall reliability. Interleaving of the carriers can be used to modulate the reference signals for each leg, which leads to a reduction in the output current ripple without resorting to increasing the switching frequency. A whole set of shifted carriers is required if interleaved pulse-width modulators are used. Implementing this by means of a digital signal processor (DSP) means that the higher the number of carriers, the higher the number of DSP timing resources required. Provided that the latter are usually limited, this could be a drawback when increasing the number of interleaved carriers. In this thesis the implementation of a pulse-width modulation (PWM) scheme where all modulators use the same carrier offering the same results as if a set of n interleaved carriers were used is presented. Since the proposed algorithm takes maximum benefit from the PWM units available in a DSP, a higher number of legs connected in parallel can be controlled without adding any external processing hardware. In multiphase voltage source inverters with n interleaved parallel-connected legs, the best single-phase output voltage is achieved when the carriers are evenly phase shifted. However, switching among nonadjacent levels can be observed at regular intervals in the line-to-line voltages, causing bad harmonic performance. This thesis includes a novel implementation of PWM that improves the quality of the line-to-line output voltages in interleaved multiphase voltage-source inverters. With the proposed method, switching in the line-to-line voltages happens exclusively between adjacent levels. The modulator utilizes two sets of n evenly phase-shifted carriers that are dynamically allocated. Because of its generality, the proposed implementation is valid for any number of phases and any number of legs in parallel. All the modulation and control algorithms proposed in this thesis have been firstly simulated on Matlab/Simulink models, and then experimentally corroborated on a low power laboratory prototype.El número de aplicaciones que requiere del uso de convertidores de potencia ha crecido de forma regular en los últimos años debido a cuestiones económicas y ambientales. Entre ellas se incluyen fuentes de alimentación ininterrumpibles, accionamientos de motores y sistemas de generación distribuida, como paneles fotovoltaicos o turbinas eólicas. La potencia nominal de dichos convertidores puede aumentarse incrementando las corrientes de salida. Esto puede lograrse mediante la conexión en paralelo de: semiconductores, ramas de convertidor o convertidores. La conexión en paralelo de las ramas de un inversor con fuente de tensión se efectúa mediante inductancias, que pueden estar magnéticamente acopladas o no. Una de las cuestiones que hay que lograr es una contribución equitativa a la corriente de salida por parte de todas las ramas. Los desequilibrios se deben a las corrientes que circulan entre las ramas y que deben evitarse, o controlarse, pues causan solicitaciones y pérdidas adicionales en los dispositivos de potencia del convertidor. En esta tesis se presenta una técnica eficiente para conseguir dicho equilibrio. Dicha técnica es efectiva independientemente del tipo de bobinas utilizado. A pesar de las cuestiones mencionadas, los beneficios de la conexión de ramas en paralelo las convierte en una opción a considerar. Entre sus beneficios adicionales se encuentran la mejora en la distorsión armónica total de las tensiones y corrientes de salida y la reducción de los filtros de salida. Además, los convertidores con ramas en paralelo son modulares y, de este modo, su producción y mantenimiento resulta más económico. Es más, son ideales para la implantación de técnicas tolerantes a fallos, lo que permite obtener sistemas con una mejor fiabilidad global. Para la modulación de las señales de cada rama pueden utilizarse técnicas de entrelazado de las portadoras, lo que conduce a un menor rizado en la corriente de salida sin tener que recurrir a mayores frecuencias de conmutación. Si se usan moduladores de anchura de pulso entrelazados, se necesita un conjunto de señales portadoras desplazadas. La implantación de esto mediante un procesador digital de señal (DSP) implica que a mayor número de portadoras, mayor será el número de recursos de temporización del DSP que se necesiten. Dado que estos últimos son normalmente limitados, esto podría ser un inconveniente cuando se quiera incrementar el número de portadoras entrelazadas. En esta tesis se presenta la implementación de un esquema de modulación de anchura de pulso (PWM) en el que todos los moduladores usan una misma portadora y que ofrece el mismo resultado que si se utilizara todo un conjunto de portadoras entrelazadas. Como el algoritmo propuesto saca el mejor provecho de las unidades de PWM disponibles en el DSP, se podría controlar un mayor número de ramas en paralelo sin necesidad de ninguna circuitería externa adicional. En inversores con fuente de corriente polifásicos con n ramas conectadas en paralelo, la mejor tensión de fase de salida se obtiene cuando las portadoras están desfasadas por igual. Sin embargo, se observan transiciones entre niveles de salida no adyacentes en las tensiones de línea a intervalos regulares, lo que ocasiona malas prestaciones armónicas. Esta tesis incluye una novedosa implementación de PWM que mejora la calidad de la tensión de línea en inversores con fuente de tensión. Con el método propuesto, las transiciones en las tensiones de línea se producen únicamente entre niveles de tensión adyacentes. El modulador utiliza dos conjuntos de n Portadoras regularmente desfasadas cuyo uso se va asignando de forma dinámica. Dada su formulación genérica, la implementación propuesta es válida para cualquier número de fases y cualquier número de rama

Single-carrier phase-disposition PWM techniques for multiple interleaved voltage-source converter legs

Interleaved converter legs are typically modulated with individual carriers per leg and phase-shifted PWM (PS-PWM) as it facilitates current balancing amongst the legs. Phase-disposition PWM (PD-PWM), despite the better harmonic performance, cannot be directly used due to the resulting current imbalance that may damage the converter. This paper addresses the current sharing issue and proposes a single-carrier PD-PWM technique for multiple leg two-level converters based on a hierarchy scheme derived from current sorting algorithms. An extension of the proposed algorithm through a switching state feedback loop, limiting the average switching frequency, is also developed. In both cases, the load current is shared amongst the legs and the high-quality of the output voltages and currents is maintained while the circulating currents amongst the converter legs are kept to a minimum. Simulation results demonstrate the method for multiple interleaved legs as well as its current sharing capabilities for high-power applications. Experimental results from a low-power laboratory prototype validate the operation of the proposed approach.Peer ReviewedPostprint (published version

Performance assessment of a wide-bandgap-semiconductor dual-active-rridge converter for electrical vehicles

Dc-dc converters can be found in different kinds of electric vehicles (EVs). Their main function is to accommodate voltages and currents to the motor or other EV systems requirements. The use of wide-bandgap (WBG) devices can improve the efficiency of silicon-based power converters, qualifying also for higher switching frequencies. In this article the features of a dual active bridge (DAB) converter are studied. The high voltage side of the DAB is implemented with Silicon Carbide (SiC) MOSFETs. For the low voltage side two types of devices are used: either Gallium Nitride (GaN) enhancement high-electronmobility transistors (e-HEMTs) or SiC MOSFETs. The influence of switching frequency and output power on the efficiency are evaluated. The parallel connection of GaN devices is proposed to overcome the device current limits and thus increase the overall DAB converter output power. A feedback controller has been designed to reduce the effects on the output voltage of load changes. The DAB converter evaluation has been realized by using MATLAB/Simulink and PLECS software.This work was supported by the Industrial Doctorate Plan of the Secretaria d’Universitats i Recerca del Departament d’Empresa i Coneixement de la Generalitat de Catalunya, and the Ministerio de Ciencia, Innovación y Universidades of Spain within the project PID2019-111420RB-I00.Peer ReviewedPostprint (author's final draft

Integrative analysis of a cancer somatic mutome

BACKGROUND: The consecutive acquisition of genetic alterations characterizes neoplastic processes. As a consequence of these alterations, molecular interactions are reprogrammed in the context of highly connected and regulated cellular networks. The recent identification of the collection of somatically mutated genes in breast tumors (breast cancer somatic "mutome") allows the comprehensive study of its function and organization in complex networks. RESULTS: We analyzed functional genomic data (loss of heterozygosity, copy number variation and gene expression in breast tumors) and protein binary interactions from public repositories to identify potential novel components of neoplastic processes, the functional relationships between them, and to examine their coordinated function in breast cancer pathogenesis. This analysis identified candidate tumor suppressors and oncogenes, and new genes whose expression level predicts survival rate in breast cancer patients. Mutome network modeling using different types of pathological and healthy functional relationships unveils functional modules significantly enriched in genes or proteins (genes/proteins) with related biological process Gene Ontology terms and containing known breast cancer-related genes/proteins. CONCLUSION: This study presents a comprehensive analysis of the breast somatic mutome, highlighting those genes with a higher probability of playing a determinant role in tumorigenesis and better defining molecular interactions related to the neoplastic process

Study and comparison of discontinuous modulation for modular multilevel converters in motor drive applications

Discontinuous modulation applied to modular multilevel converters is an effective method for reducing the capacitor voltage ripples. In this paper, the discontinuous modulation is adapted and used in a motor drive application. For proper operation of the converter, a new energy controller is presented, which is suitable for operation with nonsinusoidal reference signals. Experimental results comparing the discontinuous modulation with other techniques operating at low motor speeds are shown. The results demonstrate the effectiveness of the discontinuous modulation on reducing capacitor voltage ripples and power losses.Postprint (published version

Current balancing strategy in parallel-connected legs of power inverters

The parallel connection of inverter legs is a way to increase the output currents and thus the converter rated power. The connection is made by inductors and a critical issue is to achieve balanced currents among the legs. Circulating currents produce additional losses and stress to the power devices of the converter. Therefore, they should be controlled and minimized. An efficient technique to achieve such a balance is presented in this paper. The proposed strategy does not include proportional-integral (PI) controllers and parameter tuning is not required. The exact control action to achieve current balance is straightforward calculated and applied. Simulation and experimental results are shown in this paper to verify efficiency of the proposed balancing method.Postprint (author’s final draft

Laboratori semipresencial de microprocessadors

L’objectiu final d’aquest projecte és millorar la docència impartida per el Departament d’Enginyeria Electrònica en el Campus de Terrassa en el àrea de microprocessadors. La millora té dos eixos fonamentals, d’una banda coordinar els continguts i els mètodes docents en les assignatures de primer i segon cicle i de l’altre dotar d’un caràcter semipresencial a les assignatures en general i a les pràctiques de laboratori en particular. Les actuacions dutes a terme s’han centrat en l’adequació i ampliació del material de laboratori, en el desenvolupament de nou material docent multimèdia, en el desenvolupament d’una plataforma web d’e-learning i finalment el desenvolupament d’un simulador software d’un dels equips de laboratori. La plataforma web i el simulador son els resultats més innovadors del projecte permeten a l’alumne, si ho desitja, un aprenentatge semipresencial, gràcies a les facilitats de comunicació de la plataforma i a la facilitat de experimentació amb el simulador

Common-mode voltage mitigation strategies using sigma-delta modulation in five-phase VSIs

© 2022 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.Various sigma–delta ( S ¿ ) modulation techniques for reducing the maximum peak-to-peak amplitude of common-mode voltage (CMV) by 80% in a five-phase, high-frequency voltage source inverter (VSI) are proposed and evaluated in this article. These techniques are based on choosing a set of vectors that limits the CMV amplitude. Operating the VSI under high-frequency pulsewidth modulations (PWM) generates a large number of changes in the CMV levels, which leads to common-mode currents (CMCs) and conducted electromagnetic interferences (EMIs). The proposed modulation techniques achieve the following: 1) High-efficiency converter operation and output voltage with low total harmonic distortion (THD); 2) an 80% reduction in CMV peak-to-peak amplitude; 3) a decrease in the number of the CMV transitions, thus reducing the CMCs; and 4) a decrease in the conducted EMI amplitude. The use of single-loop and double-loop S ¿ modulators is analyzed by means of Matlab/Simulink and PLECS simulations. The implementation of the proposed modulation techniques has been experimentally evaluated using a five-phase VSI with silicon carbide semiconductors. In order to demonstrate the improved performance, the results obtained are compared with those of other PWM and space vector modulation techniques that also mitigate the CMV amplitude by 80% but lack the other improvements.Peer ReviewedPostprint (author's final draft